Cadence Encounter Platform Supports Virage Logic Structured-ASIC Design Libraries
SAN JOSE, Calif.—(BUSINESS WIRE)—June 1, 2004—
Cadence Design Systems, Inc. (NYSE:CDN) and Virage Logic
Corporation (Nasdaq:VIRL) today announced support for both Area, Speed
and Power (ASAP) Logic(TM) structured-ASIC Metal Programmable and
Standard Cell Libraries within the industry-leading Cadence(R)
Encounter(TM) digital IC design platform. This leverages the
production-proven capabilities of SoC Encounter's IC implementation in
the structured array, as well as standard cell markets. Further, it
enables mutual customers to make trade-offs between density, cost and
performance according to their requirements. This capability is
deployed with SoC Encounter 3.3, in production now.
"Cadence support of Virage Logic's structured-ASIC libraries
provides a real advantage to customers," said Lavi Lev, Cadence
executive vice president and general manager. "It expands our
industry-leading support in this critical emerging marketplace from
traditional ASIC vendors to COT customers, who now can enjoy the
benefits of the structured-ASIC approach within the integrated
RTL-to-GDSII design environment of SoC-Encounter."
"We are excited to announce mutual support for our ASAP Logic
Metal Programmable Cell Libraries within the SoC Encounter platform,"
said Adam Kablanian, president and chief executive officer of Virage
Logic. "The large installed base of SoC Encounter users now has the
flexibility of mixing and matching our metal programmable and standard
cell libraries on the same design to achieve maximum savings in
overall chip costs."
About Virage Logic ASAP Logic Products
ASAP Logic products contain application-optimized libraries
targeted to unique market requirements and are based on Virage Logic's
proprietary and patented routing methodology and cell architecture.
ASAP Logic Metal Programmable Cell Libraries are used in
System-on-Chip (SoC) designs to economically enable functional
reprogrammability by changing only a few metal and via masks. ASAP
Logic Standard Cell Libraries are optimized for area, speed, and power
and provide up to a 30 percent increase in utilization when compared
to conventional standard cell libraries.
About Virage Logic
Virage Logic Corporation (Nasdaq:VIRL) is a leading provider of
best-in-class semiconductor IP platforms based on memory, logic, and
I/Os that are silicon-proven and production ready. Virage Logic meets
market demands for cost reduction, while improving performance and
reliability for fabless and integrated device manufacturer (IDM)
companies focused on the consumer, communications and networking,
handheld and portable, and computer and graphics markets. Virage Logic
is headquartered in Fremont, California and has sales, support and
engineering offices worldwide. For more information, visit
www.viragelogic.com or call 877-360-6690 toll free or 510-360-8000.
About Cadence
Cadence is the largest supplier of electronic design technologies
and engineering services. Cadence solutions are used to accelerate and
manage the design of semiconductors, computer systems, networking and
telecommunications equipment, consumer electronics, and a variety of
other electronics-based products. With approximately 4,800 employees
and 2003 revenues of approximately $1.1 billion, Cadence has sales
offices, design centers, and research facilities around the world. The
company is headquartered in San Jose, Calif., and traded on the New
York Stock Exchange under the symbol CDN. More information about the
company, its products and services is available at www.cadence.com.
Cadence and the Cadence logo are registered trademarks and
Encounter, SoC Encounter and NanoRoute are trademarks of Cadence
Design Systems, Inc. All other trademarks are the property of their
respective owners.
Contact:
Cadence Design Systems, Inc.
Judy Erkanat, 408-894-2302
jerkanat@cadence.com
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